This invention relates to digital filters and, more particularly, to recursive digital filters. A digital filter typically filters or otherwise conditions digital signals or words applied to it. The filtered digital signals or words may then be further processed by other equipment to extract information contained therein.
In the prior art, it has frequently been difficult and impractical to implement recursive filters due to multiplier requirements. Multipliers are required for multiplying the digital input signal by digital coefficients to effect a filter with desirable filter characteristics such as a flat frequency response, a sharp frequency cutoff, a low insertion loss, and the like. See, for example, Patkay, et al., "Front End Design for Digital Signal Analysis", Hewlett-Packard Journal, p. 10, October 1977. This multiplication process typically requires complex circuits and long sequences of repetitive operations. Such long sequences of operations inherently limit the maximum operating speed of the filter. When the digital word size of the input signal is long, or when high resolution is required, the circuits become more complex and the limitation on the speed of operation becomes more severe. To minimize these difficulties, use of memory storage devices to replace the requirement for multipliers have been attempted. For example, Betts, in U.S. Pat. No. 4,125,900, and Delforge, in U.S. Pat. No. 4,146,931, both implement a digital filter using this approach. Even with the use of memory storage devices, these attempts to fabricate recursive digital filters nevertheless result in expensive filter structures of large physical size and large memory storage capacity.